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GLVLSI
2007
IEEE
151views VLSI» more  GLVLSI 2007»
14 years 1 months ago
Hand-in-hand verification of high-level synthesis
This paper describes a formal verification methodology of highnthesis (HLS) process. The abstraction level of the input to HLS is so high compared to that of the output that the v...
Chandan Karfa, Dipankar Sarkar, Chittaranjan A. Ma...
FMCAD
2004
Springer
14 years 29 days ago
Verification of Analog and Mixed-Signal Circuits Using Hybrid System Techniques
In this paper we demonstrate a potential extension of formal verification methodology in order to deal with time-domain properties of analog and mixed-signal circuits whose dynamic...
Thao Dang, Alexandre Donzé, Oded Maler
ESORICS
2006
Springer
14 years 27 days ago
Towards an Information-Theoretic Framework for Analyzing Intrusion Detection Systems
IDS research still needs to strengthen mathematical foundations and theoretic guidelines. In this paper, we build a formal framework, based on information theory, for analyzing and...
Guofei Gu, Prahlad Fogla, David Dagon, Wenke Lee, ...
ISOLA
2010
Springer
13 years 7 months ago
WOMM: A Weak Operational Memory Model
Abstract. Memory models of shared memory concurrent programs define the values a read of a shared memory location is allowed to see. Such memory models are typically weaker than t...
Arnab De, Abhik Roychoudhury, Deepak D'Souza
MEMOCODE
2007
IEEE
14 years 3 months ago
VT Matrix Multiply Design for MEMOCODE '07
This design presents a system optimized for complex matrix multiplications on the XUP Virtex-II board. Utilizing the GEZEL HW/SW co-simulation environment, the resulting system ac...
Eric Simpson, Pengyuan Yu, Patrick Schaumont, Sumi...