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ICML
2009
IEEE
14 years 8 months ago
The Bayesian group-Lasso for analyzing contingency tables
Group-Lasso estimators, useful in many applications, suffer from lack of meaningful variance estimates for regression coefficients. To overcome such problems, we propose a full Ba...
Sudhir Raman, Thomas J. Fuchs, Peter J. Wild, Edga...
IPPS
2000
IEEE
14 years 3 days ago
Complexity Bounds for Lookup Table Implementation of Factored Forms in FPGA Technology Mapping
We consider technology mapping from factored form binary leaf-DAG to lookup tables LUTs, such as those found in eld programmable gate arrays. Polynomial time algorithms exist f...
Wenyi Feng, Fred J. Meyer, Fabrizio Lombardi
ISMVL
1998
IEEE
113views Hardware» more  ISMVL 1998»
13 years 12 months ago
Look-up Tables (LUTs) for Multiple-Valued, Combinational Logic
The use of Look-Up Tables (LUTs) is extended from binary to multiple-valued logic (MVL) circuits. A multiplevalued LUT can be implemented using both current-mode and voltage-mode ...
Ali Sheikholeslami, R. Yoshimura, P. Glenn Gulak
ACMACE
2004
ACM
13 years 11 months ago
CamBall: augmented networked table tennis played with real rackets
We present a computer system for natural interaction in an augmented virtual environment, enabling people to play table tennis over Internet/LAN with real rackets. No special hard...
Charles Woodward, Petri Honkamaa, Jani Jäppin...
ARC
2012
Springer
256views Hardware» more  ARC 2012»
12 years 3 months ago
Table-Based Division by Small Integer Constants
Computing cores to be implemented on FPGAs may involve divisions by small integer constants in fixed or floating point. This article presents a family of architectures addressing...
Florent de Dinechin, Laurent-Stéphane Didie...