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DFT
2006
IEEE
105views VLSI» more  DFT 2006»
14 years 1 months ago
Thermal-Aware SoC Test Scheduling with Test Set Partitioning and Interleaving
1 High temperature has become a major problem for system-on-chip testing. In order to reduce the test time while keeping the temperature of the chip under test within a safe range,...
Zhiyuan He, Zebo Peng, Petru Eles, Paul M. Rosinge...
OOPSLA
2004
Springer
14 years 1 months ago
A practical type system and language for reference immutability
This paper describes a type system that is capable of expressing and enforcing immutability constraints. The specific constraint exis that the abstract state of the object to whi...
Adrian Birka, Michael D. Ernst
VMCAI
2004
Springer
14 years 1 months ago
Boolean Algebra of Shape Analysis Constraints
Shape analysis is a promising technique for statically verifying and extracting properties of programs that manipulate complex data structures. We introduce a new characterization...
Viktor Kuncak, Martin C. Rinard
CASES
2010
ACM
13 years 5 months ago
Implementing virtual secure circuit using a custom-instruction approach
Although cryptographic algorithms are designed to resist at least thousands of years of cryptoanalysis, implementing them with either software or hardware usually leaks additional...
Zhimin Chen, Ambuj Sinha, Patrick Schaumont
LCTRTS
2010
Springer
13 years 5 months ago
Translating concurrent action oriented specifications to synchronous guarded actions
Concurrent Action-Oriented Specifications (CAOS) model the behavior of a synchronous hardware circuit as asynchronous guarded at an abstraction level higher than the Register Tran...
Jens Brandt, Klaus Schneider, Sandeep K. Shukla