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HICSS
1995
IEEE
109views Biometrics» more  HICSS 1995»
14 years 9 days ago
The architecture of an optimistic CPU: the WarpEngine
The architecture for a shared memory CPU is described. The CPU allows for parallelism down to the level of single instructions and is tolerant of memory latency. All executable in...
John G. Cleary, Murray Pearson, Husam Kinawi
JUCS
2010
154views more  JUCS 2010»
13 years 7 months ago
SimCon: A Tool to Support Rapid Evaluation of Smart Building Application Design using Context Simulation and Virtual Reality
: The promise of smart buildings (SBs) is a safer more productive environment for users and a more operationally efficient building for owners. The automation of building function ...
Kris McGlinn, Eleanor O'Neill, Alan Gibney, Declan...
DAC
2004
ACM
14 years 9 months ago
Automated energy/performance macromodeling of embedded software
Efficient energy and performance estimation of embedded software is a critical part of any system-level design flow. Macromodeling based estimation is an attempt to speed up estim...
Anish Muttreja, Anand Raghunathan, Srivaths Ravi, ...
ISARCS
2010
240views Hardware» more  ISARCS 2010»
13 years 10 months ago
Engineering a Distributed e-Voting System Architecture: Meeting Critical Requirements
Voting is a critical component of any democratic process; and electronic voting systems should be developed following best practices for critical system development. E-voting has i...
J. Paul Gibson, Eric Lallet, Jean-Luc Raffy
SAC
2003
ACM
14 years 2 months ago
COSAR: Commitment-Oriented "Sense and Respond" System for Microelectronic Manufacturing
Microelectronic manufacturing deals with the efficient coordination of manufacturing processes and owning enterprises along a value chain to provide microelectronic products to cu...
Jun-Jang Jeng, Henry Chang, Jen-Yao Chung