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» Functional Validation of Programmable Architectures
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ISCAS
2003
IEEE
129views Hardware» more  ISCAS 2003»
14 years 2 months ago
SONICmole: a debugging environment for the UltraSONIC reconfigurable computer
Reconfigurable Computers based on a combination of conventional microprocessors and Field Programmable Gate Arrays (FPGAs) presents new challenges to designers. Debugging on such ...
Theerayod Wiangtong, Chun Te Ewe, Peter Y. K. Cheu...
ARGMAS
2008
Springer
13 years 11 months ago
Argumentation and Artifact for Dialogue Support
Intelligent and autonomous software agents may engage in dialogue and argument with one another, and much recent research has considered protocols, architectures and frameworks for...
Enrico Oliva, Mirko Viroli, Andrea Omicini, Peter ...
FPGA
2008
ACM
133views FPGA» more  FPGA 2008»
13 years 10 months ago
Vector processing as a soft-core CPU accelerator
The currently accepted method of accelerating applications in FPGA soft processor systems is to design a custom hardware accelerator. This paper suggests the alternative approach ...
Jason Yu, Guy Lemieux, Christopher Eagleston
RTSS
2007
IEEE
14 years 3 months ago
A UML-Based Design Framework for Time-Triggered Applications
Time-triggered architectures (TTAs) are strong candidate platforms for safety-critical real-time applications. A typical time-triggered architecture is constituted by one or more ...
Kathy Dang Nguyen, P. S. Thiagarajan, Weng-Fai Won...
FPL
2008
Springer
110views Hardware» more  FPL 2008»
13 years 10 months ago
Automatic generation of run-time parameterizable configurations
In many applications, subsequent data manipulations differ only in a small set of parameter values. Because of their reconfigurability, FPGAs (Field Programmable Gate Arrays) can ...
Karel Bruneel, Dirk Stroobandt