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CAV
1998
Springer
138views Hardware» more  CAV 1998»
14 years 1 months ago
Model Checking for a First-Order Temporal Logic Using Multiway Decision Graphs
bstract description of state machines (ASMs), in which data and data operations are d using abstract sort and uninterpreted function symbols. ASMs are suitable for describing Regis...
Ying Xu, Eduard Cerny, Xiaoyu Song, Francisco Core...
EVOW
2008
Springer
13 years 10 months ago
Analysis of Reconfigurable Logic Blocks for Evolvable Digital Architectures
Abstract. In this paper we propose three small instances of a reconfigurable circuit and analyze their properties using the brute force method and evolutionary algorithm. Although ...
Lukás Sekanina, Petr Mikusek
CAV
2010
Springer
156views Hardware» more  CAV 2010»
13 years 9 months ago
A Logical Product Approach to Zonotope Intersection
We define and study a new abstract domain which is a fine-grained combination of zonotopes with (sub-)polyhedric domains such as the interval, ocinear template or polyhedron domain...
Khalil Ghorbal, Eric Goubault, Sylvie Putot
ETFA
2006
IEEE
14 years 2 months ago
Modelling and Verification of IEC 61499 Applications using Prolog
This paper presents a new approach to modelling and verification of function block applications of the IEC 61499 standard. The approach uses the language of logic programming Prol...
Victor Dubinin, Valeriy Vyatkin, Hans-Michael Hani...
CORR
2010
Springer
79views Education» more  CORR 2010»
13 years 9 months ago
Variable elimination for building interpreters
In this paper, we build an interpreter by reusing host language functions instead of recoding mechanisms of function application that are already available in the host language (t...
Julien Cohen, Jean-Louis Giavitto, Olivier Michel