472 search results - page 55 / 95 » Functional simulation using binary decision diagrams |
TABLEAUX
1998
Springer
14 years 1 months ago
1998
Springer
ple (Extended Abstract) Edmund M. Clarke and Sergey Berezin Carnegie Mellon University -- USA Model checking is an automatic verification technique for finite state concurrent syst...
CAV
2006
Springer
14 years 24 days ago
2006
Springer
We present an approach for applying symmetry reduction techniques to probabilistic model checking, a formal verification method for the quantitative analysis of systems with stocha...
CHARME
2005
Springer
14 years 2 months ago
2005
Springer
Abstract. Model checking is a formal technique for automatically verifying that a finite-state model satisfies a temporal property. In model checking, generally Binary Decision D...
FM
2001
Springer
14 years 1 months ago
2001
Springer
To develop efficient algorithms for the reachability analysis of timed automata, a promising approach is to use binary decision diagrams (BDDs) as data structure for the representa...
VLSID
1999
IEEE
14 years 1 months ago
1999
IEEE
In this paper we address the problem of detailed FPGA routing using Boolean formulation methods. In the context of FPGA routing where routing resources are fixed, Boolean formulat...