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» Functions Definable by Arithmetic Circuits
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TCAD
2002
110views more  TCAD 2002»
13 years 7 months ago
A constructive genetic algorithm for gate matrix layout problems
This paper describes an application of a Constructive Genetic Algorithm (CGA) to the Gate Matrix Layout Problem (GMLP). The GMLP happens in very large scale integration (VLSI) desi...
Alexandre César Muniz de Oliveira, Luiz Ant...
ICLP
2010
Springer
13 years 5 months ago
A Framework for Verification and Debugging of Resource Usage Properties: Resource Usage Verification
We present a framework for (static) verification of general resource usage program properties. The framework extends the criteria of correctness as the conformance of a program to ...
Pedro López-García, Luthfi Darmawan,...
INTEGRATION
2008
87views more  INTEGRATION 2008»
13 years 7 months ago
SafeResynth: A new technique for physical synthesis
Physical synthesis is a relatively young field in Electronic Design Automation. Many published optimizations for physical synthesis end up hurting the quality of the final design,...
Kai-Hui Chang, Igor L. Markov, Valeria Bertacco
IACR
2011
127views more  IACR 2011»
12 years 7 months ago
Near-Linear Unconditionally-Secure Multiparty Computation with a Dishonest Minority
Secure multiparty computation (MPC) allows a set of n players to compute any public function, given as an arithmetic circuit, on private inputs, so that privacy of the inputs as we...
Eli Ben-Sasson, Serge Fehr, Rafail Ostrovsky
ETFA
2006
IEEE
14 years 1 months ago
A Framework for Fault Tolerant Real Time Systems Based on Reconfigurable FPGAs
♦ To increase the amount of logic available to the users in SRAM-based FPGAs, manufacturers are using nanometric technologies to boost logic density and reduce costs, making its ...
Manuel G. Gericota, Luís F. Lemos, Gustavo ...