694 search results - page 70 / 139 » Gate Sizing Using a Statistical Delay Model |
101
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AHS
2006
IEEE
15 years 8 months ago
2006
IEEE
Traditional approaches to evolvable hardware (EHW), in which the field programmable gate array (FPGA) configuration is directly encoded, have not scaled well with increasing cir...
160
Voted
NIPS
2008
15 years 3 months ago
2008
Identification and comparison of nonlinear dynamical system models using noisy and sparse experimental data is a vital task in many fields, however current methods are computation...
119
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TCC
2009
Springer
16 years 2 months ago
2009
Springer
We study the complexity of securely evaluating arithmetic circuits over finite rings. This question is motivated by natural secure computation tasks. Focusing mainly on the case o...
104
Voted
DIS
2007
Springer
15 years 8 months ago
2007
Springer
Abstract. The Minimum Description Length (MDL) is an informationtheoretic principle that can be used for model selection and other statistical inference tasks. One way to implement...
123
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SPAA
2005
ACM
15 years 8 months ago
2005
ACM
We study the problem of asymptotically reducing the runtime of serial computations with circuits of polynomial size. We give an algorithmic size-depth tradeoff for parallelizing ...