694 search results - page 79 / 139 » Gate Sizing Using a Statistical Delay Model |
SIGMETRICS
2003
ACM
14 years 3 months ago
2003
ACM
—Node movement can be exploited to reduce the energy consumption of wireless network communication. The strategy consists in delaying communication until a mobile node moves clos...
TCAD
2010
13 years 5 months ago
2010
Design debugging is a major bottleneck in modern VLSI design flows as both the design size and the length of the error trace contribute to its inherent complexity. With typical des...
CISS
2008
IEEE
14 years 4 months ago
2008
IEEE
—We consider connection-level models of resource allocation in the Internet, where files arrive into the network according to a Poisson process and the size of each file is exp...
ICDCS
1993
IEEE
14 years 2 months ago
1993
IEEE
A network subsystem supporting a continuous media file system must guarantee a minimum throughput, a maximum delay, and a maximum jitter. We present a transport protocol that pro...
ARC
2006
Springer
14 years 2 months ago
2006
Springer
Abstract. Memory accesses contribute sunstantially to aggregate system delays. It is critical for designers to ensure that the memory subsystem is designed efficiently, and much wo...