268 search results - page 20 / 54 » Gating currents |
DT
2007
13 years 7 months ago
2007
This paper proposes a new heuristic approach to determine the input pattern that minimizes leakage currents of nanometer CMOS circuits during sleep mode considering stack and fano...
FCCM
2009
IEEE
13 years 11 months ago
2009
IEEE
Most high-speed Internet Protocol (IP) lookup implementations use tree traversal and pipelining. Due to the available on-chip memory and the number of I/O pins of Field Programmab...
SLIP
2009
ACM
14 years 2 months ago
2009
ACM
This paper proposes an efficient method to predict the worst case of voltage violation by multi-domain clock gating in a three-dimensional (3D) on-chip power network considering l...
ENGL
2008
13 years 7 months ago
2008
This paper presents a compact analog neuron cell incorporating an array of charge-coupled synapses connected via a common output terminal. The novel silicon synapse is based on a t...
VLSID
2009
IEEE
14 years 8 months ago
2009
IEEE
Designing MOS decoupling capacitors (DECAPs) in nanotechnologies provides many challenges due to the existing trade-offs among transient time response behavior, area, and gate lea...