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FPGA
2010
ACM
209views FPGA» more  FPGA 2010»
14 years 6 months ago
FPGA power reduction by guarded evaluation
Guarded evaluation is a power reduction technique that involves identifying sub-circuits (within a larger circuit) whose inputs can be held constant (guarded) at specific times d...
Chirag Ravishankar, Jason Helge Anderson
CVPR
2010
IEEE
14 years 5 months ago
Finding Nemo: Deformable Object Class Modelling using Curve Matching
An image search for “clownfish” yields many photos of clownfish, each of a different individual of a different 3D shape in a different pose. Yet, to the human observer, this...
Mukta Prasad, Andrew Fitzgibbon
WWW
2010
ACM
14 years 4 months ago
A client-server architecture for state-dependent dynamic visualizations on the web
As sophisticated enterprise applications move to the Web, some advanced user experiences become difficult to migrate due to prohibitively high computation, memory, and bandwidth r...
Daniel Coffman, Danny Soroker, Chandra Narayanaswa...
CGO
2010
IEEE
14 years 4 months ago
Exploiting statistical correlations for proactive prediction of program behaviors
This paper presents a finding and a technique on program behavior prediction. The finding is that surprisingly strong statistical correlations exist among the behaviors of diffe...
Yunlian Jiang, Eddy Z. Zhang, Kai Tian, Feng Mao, ...
CHI
2010
ACM
14 years 4 months ago
Understanding and evaluating cooperative games
Cooperative design has been an integral part of many games. With the success of games like Left4Dead, many game designers and producers are currently exploring the addition of coo...
Magy Seif El-Nasr, Bardia Aghabeigi, David Milam, ...