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ICPR
2010
IEEE
14 years 4 months ago
Gait Learning-Based Regenerative Model: A Level Set Approach
We propose a learning method for gait synthesis from a sequence of shapes(frames) with the ability to extrapolate to novel data. It involves the application of PCA, first to redu...
Muayed Sattar Al-Huseiny, Sasan Mahmoodi, Mark Nix...
ISCAS
2005
IEEE
155views Hardware» more  ISCAS 2005»
14 years 2 months ago
Hyperblock formation: a power/energy perspective for high performance VLIW architectures
— Architectures based on Very Long Instruction Word (VLIW) processors are an optimal choice in the attempt to obtain high performance levels in mobile devices. The effectiveness ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...
ICICS
2004
Springer
14 years 2 months ago
Hydan: Hiding Information in Program Binaries
We present a scheme to steganographically embed information in x86 program binaries. We define sets of functionally-equivalent instructions, and use a key-derived selection proces...
Rakan El-Khalil, Angelos D. Keromytis
USENIX
2008
13 years 11 months ago
Vx32: Lightweight User-level Sandboxing on the x86
Code sandboxing is useful for many purposes, but most sandboxing techniques require kernel modifications, do not completely isolate guest code, or incur substantial performance co...
Bryan Ford, Russ Cox
CC
2008
Springer
240views System Software» more  CC 2008»
13 years 11 months ago
Hardware JIT Compilation for Off-the-Shelf Dynamically Reconfigurable FPGAs
JIT compilation is a model of execution which translates at run time critical parts of the program to a low level representation. Typically a JIT compiler produces machine code fro...
Etienne Bergeron, Marc Feeley, Jean-Pierre David