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HPDC
2007
IEEE
14 years 2 months ago
A fast topology inference: a building block for network-aware parallel processing
Adapting to the network is the key to achieving high performance for communication-intensive applications, including scientific computing, data intensive computing, and multicast...
Tatsuya Shirai, Hideo Saito, Kenjiro Taura
MSE
2005
IEEE
111views Hardware» more  MSE 2005»
14 years 2 months ago
Real World SOC Experience for the Classroom
System-on-Chip design is an important new trend in the design of complex integrated circuits. The integration of a microprocessor, memory and peripherals onto a single die opens n...
Johannes Grad, James E. Stine, David D. Neiman
JUCS
2008
137views more  JUCS 2008»
13 years 8 months ago
The Trade-Offs of Blending Synchronous and Asynchronous Communication Services to Support Contextual Collaboration
: Contextual collaboration seamlessly integrates existing groupware technologies into a uniform user experience that combines synchronous and asynchronous interactions. This user e...
Werner Geyer, Roberto Silveira Silva Filho, Beth B...
CN
2008
109views more  CN 2008»
13 years 8 months ago
CoCONet: A collision-free container-based core optical network
Electrical-to-optical domain conversions and vice versa (denoted by O/E/O conversions) for each hop in optical core transport networks impose considerable capital and financial ov...
Amin R. Mazloom, Preetam Ghosh, Kalyan Basu, Sajal...
JOIN
2006
128views more  JOIN 2006»
13 years 8 months ago
Galo: a Deployable Framework for Providing Better than Best-Effort Quality of Service
In this paper we propose a deployable approach to improving QoS by using a generic, extendable, overlay architecture; the Generalized Application Layer Overlay (GALO). The goals of...
Raheem A. Beyah, Raghupathy Sivakumar, John A. Cop...