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» Global Lower Bounds for the VLSI Macrocell Floorplanning Pro...

89

IWSOC
2005
IEEE

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Global Lower Bounds for the VLSI Macrocell Floorplanning Problem Using Semidefinite Optimization

15 years 9 months ago

Global Lower Bounds for the VLSI Macrocell Floorplanning Problem Using Semidefinite Optimization

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P. L. Takouda, Miguel F. Anjos, Anthony Vannelli

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142

Voted

ISPD
2004
ACM

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Almost optimum placement legalization by minimum cost flow and dynamic programming

15 years 9 months ago

Almost optimum placement legalization by minimum cost flow and dynamic programming

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VLSI placement tools usually work in two steps: First, the cells that have to be placed are roughly spread out over the chip area ignoring disjointness (global placement). Then, i...

Ulrich Brenner, Anna Pauli, Jens Vygen

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