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» Global Multi-Threaded Instruction Scheduling
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CODES
1999
IEEE
14 years 27 days ago
A flexible code generation framework for the design of application specific programmable processors
This paper introduces a flexible code generation framework dedicated to the design of application specific programmable processors. This tool allows the user to build specific com...
François Charot, Vincent Messé
HPCA
2009
IEEE
14 years 9 months ago
Design and implementation of software-managed caches for multicores with local memory
Heterogeneous multicores, such as Cell BE processors and GPGPUs, typically do not have caches for their accelerator cores because coherence traffic, cache misses, and latencies fr...
Sangmin Seo, Jaejin Lee, Zehra Sura
PIMRC
2008
IEEE
14 years 3 months ago
Active Highways (Position Paper)
—Highways are an essential component of our society because they are critical to quality of life and to local and national economies. Under good conditions, highways provide a sa...
Liviu Iftode, Stephen Smaldone, Mario Gerla, James...
PRICAI
2004
Springer
14 years 1 months ago
Solving Over-Constrained Temporal Reasoning Problems Using Local Search
Temporal reasoning is an important task in many areas of computer science including planning, scheduling, temporal databases and instruction optimisation for compilers. Given a kno...
Matthew Beaumont, John Thornton, Abdul Sattar, Mic...
CASES
2005
ACM
13 years 10 months ago
Exploiting pipelining to relax register-file port constraints of instruction-set extensions
Customisable embedded processors are becoming available on the market, thus making it possible for designers to speed up execution of applications by using Application-specific F...
Laura Pozzi, Paolo Ienne