122 search results - page 10 / 25 » Global management of cache hierarchies |
ACMMSP
2006
ACM
14 years 3 months ago
2006
ACM
Stencil-based kernels constitute the core of many scientific applications on block-structured grids. Unfortunately, these codes achieve a low fraction of peak performance, due pr...
IEEEPACT
2006
IEEE
14 years 3 months ago
2006
IEEE
On machines with high-performance processors, the memory system continues to be a performance bottleneck. Compilers insert prefetch operations and reorder data accesses to improve...
HPCA
2009
IEEE
14 years 10 months ago
2009
IEEE
Heterogeneous multicores, such as Cell BE processors and GPGPUs, typically do not have caches for their accelerator cores because coherence traffic, cache misses, and latencies fr...
MMS
2002
13 years 9 months ago
2002
Abstract. In this paper, we present a separable, reusable middleware solution that provides coordinated, end-to-end QoS management over any type of service component, and can use e...
SC
1992
ACM
14 years 1 months ago
1992
ACM
We are currently developing Willow, a shared-memory multiprocessor whose design provides system capacity and performance capable of supporting over a thousand commercial microproc...