122 search results - page 15 / 25 » Global management of cache hierarchies |
MSS
2003
IEEE
14 years 1 months ago
2003
IEEE
The functionality that is provided by Mass Storage Systems can be implemented using data grid technology. Data grids already provide many of the required features, including a log...
TC
2008
13 years 8 months ago
2008
To support dynamic address translation in today's microprocessors, the first-level cache is accessed in parallel with a translation lookaside buffer (TLB). However, this curre...
SOSP
2003
ACM
14 years 5 months ago
2003
ACM
The challenge for user authentication in a global file system is allowing people to grant access to specific users and groups in remote administrative domains, without assuming ...
ICPP
2009
IEEE
14 years 3 months ago
2009
IEEE
—This paper reports a study of mapping the Finite Difference Time Domain (FDTD) application to the IBM Cyclops64 (C64) many-core chip architecture [1]. C64 is chosen for this stu...
CASES
2000
ACM
14 years 28 days ago
2000
ACM
Dealing with global on-chip memory allocation/de-allocation in a dynamic yet deterministic way is an important issue for upcoming billion transistor multiprocessor System-on-a-Chi...