104 search results - page 21 / 21 » Globally Asynchronous Locally Synchronous FPGA Architectures |
HIPEAC
2007
Springer
14 years 1 months ago
2007
Springer
Caches are designed to provide the best tradeoff between access speed and capacity for a set of target applications. Unfortunately, different applications, and even different phas...
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
Behavior synthesis and optimization beyond the register transfer level require an efficient utilization of the underlying platform features. This paper presents a platform-based ...
JNSM
2002
13 years 7 months ago
2002
Realizing high volume of data transmission in real time communication in a highly dynamic architecture like Mobile Ad hoc Networks (MANET) still remains a major point of research....
CA
1999
IEEE
13 years 11 months ago
1999
IEEE
The continuously increasing complexity of computer animationsmakes it necessary to rely on the knowledge of various experts to cover the different areas of computer graphics and a...