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GD
2009
Springer
14 years 2 months ago
Upward Planarization Layout
Recently, we have presented a new practical method for upward crossing minimization [4], which clearly outperformed existing approaches for drawing hierarchical graphs in that resp...
Markus Chimani, Carsten Gutwenger, Petra Mutzel, H...
GD
1998
Springer
14 years 2 months ago
Refinement of Orthogonal Graph Drawings
Current orthogonal graph drawing algorithms produce drawings which are generally good. However, many times the quality of orthogonal drawings can be significantly improved with a ...
Janet M. Six, Konstantinos G. Kakoulis, Ioannis G....
JGAA
2000
85views more  JGAA 2000»
13 years 9 months ago
Techniques for the Refinement of Orthogonal Graph Drawings
Current orthogonal graph drawing algorithms produce drawings which are generally good. However, many times the quality of orthogonal drawings can be significantly improved with a ...
Janet M. Six, Konstantinos G. Kakoulis, Ioannis G....
DAC
1995
ACM
14 years 1 months ago
Automatic Layout Synthesis of Leaf Cells
––This paper describes algorithms for automatic layout synthesisofleafcellsin1–dandinanew1–1/2–dlayoutstyle,useful for non–dual circuit styles. The graph theory based a...
Sanjay Rekhi, J. Donald Trotter, Daniel H. Linder
VLSID
2008
IEEE
138views VLSI» more  VLSID 2008»
14 years 10 months ago
Memory Architecture Exploration Framework for Cache Based Embedded SOC
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and l...
T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindaraj...