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IEEEPACT
1998
IEEE
14 years 2 months ago
1998
IEEE
Global locality analysis is a technique for improving the cache performance of a sequence of loop nests through a combination of loop and data layout optimizations. Pure loop tran...
DAC
1989
ACM
14 years 2 months ago
1989
ACM
: We discuss a new approach to constructing the rectilinear Steiner tree (RST) of a given set of points in the plane, starting from a minimum spanning tree (MST). The main idea in ...
CIAC
2010
Springer
13 years 6 months ago
2010
Springer
We study the parameterized complexity of the problems of determining whether a graph contains a k-edge subgraph (k-vertex induced subgraph) that is a -graph for -graphs being one ...
SPATIALCOGNITION
2000
Springer
14 years 1 months ago
2000
Springer
The paper analyzes a diagrammatic reasoning problem that consists in finding a graphical layout which simultaneously satisfies a set of constraints expressed in a formal language a...
WSC
2004
13 years 11 months ago
2004
This paper presents a study that uses simulation to improve shop floor performance by means of two layout types and certain operational parameters. In this study, an overview of t...