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ASPDAC
2008
ACM
104views Hardware» more  ASPDAC 2008»
13 years 9 months ago
Low power clock buffer planning methodology in F-D placement for large scale circuit design
Traditionally, clock network layout is performed after cell placement. Such methodology is facing a serious problem in nanometer IC designs where people tend to use huge clock buff...
Yanfeng Wang, Qiang Zhou, Yici Cai, Jiang Hu, Xian...
FPL
2008
Springer
111views Hardware» more  FPL 2008»
13 years 9 months ago
Sampling from the exponential distribution using independent Bernoulli variates
The exponential distribution is a key distribution in many event-driven Monte-Carlo simulations, where it is used to model the time between random events in the system. This paper...
David B. Thomas, Wayne Luk
FECS
2006
159views Education» more  FECS 2006»
13 years 9 months ago
Evolving Mathematical Functions with Genetic Algorithms - A Team Project on Artificial Intelligence
- In contrast to most of the senior level Artificial Intelligence (AI) courses where AI is taught in the jargon of theoretical computer science with crowd of complex matrix algebra...
Zhiguang Xu, Chris Neasbitt, Jared Summers, Bill C...
DCOSS
2010
Springer
13 years 7 months ago
Self-stabilizing Synchronization in Mobile Sensor Networks with Covering
Synchronization is widely considered as an important service in distributed systems which may simplify protocol design. Phase clock is a general synchronization tool that provides ...
Joffroy Beauquier, Janna Burman
GLOBECOM
2008
IEEE
13 years 7 months ago
Security Rules Specification and Analysis Based on Passive Testing
Security is a critical issue in dynamic and open distributed environments such as network-based services or wireless networks. To ensure that a certain level of security is maintai...
Wissam Mallouli, Fayçal Bessayah, Ana R. Ca...