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CAL
2010
13 years 5 months ago
A Dynamic Pressure-Aware Associative Placement Strategy for Large Scale Chip Multiprocessors
This paper describes dynamic pressure-aware associative placement (DPAP), a novel distributed cache management scheme for large-scale chip multiprocessors. Our work is motivated by...
Mohammad Hammoud, Sangyeun Cho, Rami G. Melhem
LCTRTS
2004
Springer
14 years 1 months ago
Feedback driven instruction-set extension
Application specific instruction-set processors combine an efficient general purpose core with special purpose functionality that is tailored to a particular application domain. ...
Uwe Kastens, Dinh Khoi Le, Adrian Slowik, Michael ...
ICCAD
2007
IEEE
98views Hardware» more  ICCAD 2007»
14 years 4 months ago
Device-circuit co-optimization for mixed-mode circuit design via geometric programming
Modern processing technologies offer a number of types of devices such as high-VT , low-VT , thick-oxide, etc. in addition to the nominal transistor in order to meet system perfor...
Jintae Kim, Ritesh Jhaveri, Jason Woo, Chih-Kong K...
CVBIA
2005
Springer
14 years 1 months ago
Fast 3D Brain Segmentation Using Dual-Front Active Contours with Optional User-Interaction
Abstract. Important attributes of 3D brain segmentation algorithms include robustness, accuracy, computational efficiency, and facilitation of user interaction, yet few algorithms ...
Hua Li, Anthony J. Yezzi, Laurent D. Cohen
RT
2005
Springer
14 years 1 months ago
Adaptive Frameless Rendering
We propose an adaptive form of frameless rendering with the potential to dramatically increase rendering speed over conventional interactive rendering approaches. Without the rigi...
Abhinav Dayal, Cliff Woolley, Benjamin Watson, Dav...