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TELETRAFFIC
2007
Springer
14 years 2 months ago
Hierarchical Infrastructure-Based Overlay Network for Multicast Services
Abstract. This article proposes a hierarchical architecture for an infrastructure-based overlay network delivering multicast services. Such an overlay network is an alternative to ...
Josué Kuri, Ndiata Kalonji
SAC
2006
ACM
14 years 2 months ago
A concurrent reactive Esterel processor based on multi-threading
Esterel is a concurrent synchronous language for developing reactive systems. As an alternative to the classical software and hardware synthesis paths, the reactive processing app...
Xin Li, Reinhard von Hanxleden
CSC
2010
13 years 6 months ago
An Evaluation of Parallel Knapsack Algorithms on Multicore Architectures
Emergence of chip multiprocessor systems has dramatically increased the performance potential of computer systems. Since the amount of exploited parallelism is directly influenced ...
Hammad Rashid, Clara Novoa, Apan Qasem
ICS
2009
Tsinghua U.
14 years 3 months ago
Fast and scalable list ranking on the GPU
General purpose programming on the graphics processing units (GPGPU) has received a lot of attention in the parallel computing community as it promises to offer the highest perfo...
M. Suhail Rehman, Kishore Kothapalli, P. J. Naraya...
TOG
2002
134views more  TOG 2002»
13 years 8 months ago
The SAGE graphics architecture
The Scalable, Advanced Graphics Environment (SAGE) is a new high-end, multi-chip rendering architecture. Each single SAGE board can render in excess of 80 million fully lit, textu...
Michael Deering, David Naegle