395 search results - page 76 / 79 » Haemo Dialysis Software Architecture Design Experiences |
MICRO
1995
IEEE
13 years 11 months ago
1995
IEEE
Untolerated load instruction latencies often have a significant impact on overall program performance. As one means of mitigating this effect, we present an aggressive hardware-b...
ASAP
2008
IEEE
13 years 10 months ago
2008
IEEE
This paper presents a multiprocessor system on FPGA that adopts Direct Memory Access (DMA) mechanisms to move data between the external memory and the local memory of each process...
EUROPAR
2010
Springer
13 years 9 months ago
2010
Springer
Mutual exclusion locks limit concurrency but offer low latency. Software transactional memory (STM) typically has higher latency, but scales well. In this paper we propose transac...
DAIS
2009
13 years 9 months ago
2009
As peer-to-peer systems are evolving from simplistic application specific overlays to middleware platforms hosting a range of potential applications it has become evident that incr...
ICS
2010
Tsinghua U.
13 years 10 months ago
2010
Tsinghua U.
As the number of I/O-intensive MPI programs becomes increasingly large, many efforts have been made to improve I/O performance, on both software and architecture sides. On the sof...