Sciweavers

65 search results - page 11 / 13
» Hardware Architecture for Optical Flow Estimation in Real Ti...
Sort
View
JMLR
2006
80views more  JMLR 2006»
13 years 6 months ago
Using Machine Learning to Guide Architecture Simulation
An essential step in designing a new computer architecture is the careful examination of different design options. It is critical that computer architects have efficient means by ...
Greg Hamerly, Erez Perelman, Jeremy Lau, Brad Cald...
DAC
2006
ACM
14 years 7 months ago
Standard cell characterization considering lithography induced variations
As VLSI technology scales toward 65nm and beyond, both timing and power performance of integrated circuits are increasingly affected by process variations. In practice, people oft...
Ke Cao, Sorin Dobre, Jiang Hu
ECCV
2008
Springer
14 years 8 months ago
Multi-layered Decomposition of Recurrent Scenes
Abstract. There is considerable interest in techniques capable of identifying anomalies and unusual events in busy outdoor scenes, e.g. road junctions. Many approaches achieve this...
David Mark Russell, Shaogang Gong
CODES
2008
IEEE
14 years 1 months ago
Intra- and inter-processor hybrid performance modeling for MPSoC architectures
The heterogeneity of modern MPSoC architectures, coupled with the increasing complexity of the applications mapped onto them has recently led to a lot of interest in hybrid perfor...
Frank E. B. Ophelders, Samarjit Chakraborty, Henk ...
DAC
2006
ACM
14 years 7 months ago
Timing-driven Steiner trees are (practically) free
Traditionally, rectilinear Steiner minimum trees (RSMT) are widely used for routing estimation in design optimizations like floorplanning and physical synthesis. Since it optimize...
Charles J. Alpert, Andrew B. Kahng, Cliff C. N. Sz...