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ISPASS
2010
IEEE
14 years 2 months ago
Cache contention and application performance prediction for multi-core systems
—The ongoing move to chip multiprocessors (CMPs) permits greater sharing of last-level cache by processor cores but this sharing aggravates the cache contention problem, potentia...
Chi Xu, Xi Chen, Robert P. Dick, Zhuoqing Morley M...
USENIX
2000
13 years 9 months ago
Location-Aware Scheduling with Minimal Infrastructure
Mobile computers often benefit from software which adapts to their location. For example, a computer might be backed up when at the office, or the default printer might always be ...
John S. Heidemann, Dhaval Shah
ASPLOS
2004
ACM
14 years 1 months ago
Devirtualizable virtual machines enabling general, single-node, online maintenance
Maintenance is the dominant source of downtime at high availability sites. Unfortunately, the dominant mechanism for reducing this downtime, cluster rolling upgrade, has two short...
David E. Lowell, Yasushi Saito, Eileen J. Samberg
ANCS
2007
ACM
13 years 11 months ago
Compiling PCRE to FPGA for accelerating SNORT IDS
Deep Payload Inspection systems like SNORT and BRO utilize regular expression for their rules due to their high expressibility and compactness. The SNORT IDS system uses the PCRE ...
Abhishek Mitra, Walid A. Najjar, Laxmi N. Bhuyan
CASES
2008
ACM
13 years 9 months ago
Predictable programming on a precision timed architecture
In a hard real-time embedded system, the time at which a result is computed is as important as the result itself. Modern processors go to extreme lengths to ensure their function ...
Ben Lickly, Isaac Liu, Sungjun Kim, Hiren D. Patel...