152 search results - page 8 / 31 » Hardware Software Partitioning with Iterative Improvement He... |
CODES
1996
IEEE
13 years 11 months ago
1996
IEEE
The TaSCA environment for hardware/software co-design of control dominated systems implemented on a single chip includes a novel approach to the system exploration phase for the e...
IPPS
1998
IEEE
13 years 11 months ago
1998
IEEE
In this paper, we propose an integrated approach for register-sensitive software pipelining. In this approach, the heuristics proposed in the stage scheduling method of Eichenberg...
ISPD
2005
ACM
14 years 1 months ago
2005
ACM
This paper presents an efficient heuristic algorithm to design a power distribution network of a chip by employing a successive partitioning and grid refinement scheme. In an it...
IJES
2006
13 years 7 months ago
2006
Embedded real-time systems must satisfy not only logical functional requirements but also para-functional properties such as timeliness, Quality of Service (QoS) and reliability. W...
CGO
2007
IEEE
14 years 1 months ago
2007
IEEE
Emerging microprocessors offer unprecedented parallel computing capabilities and deeper memory hierarchies, increasing the importance of loop transformations in optimizing compile...