3902 search results - page 193 / 781 » Hardware Synthesis from C C Models |
158
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ERSA
2006
15 years 5 months ago
2006
Abstract-- With the constantly increasing gate capacity of FPGAs, a single FPGA chip is able to employ large-scale applications. To connect a large number of computational nodes, N...
126
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FPL
2000
Springer
15 years 7 months ago
2000
Springer
Following the simple Programmable Logic Device (SPLD) and Field Programmable Gate Array (FPGA) generations a third generation of programmable logic technologies is now reaching the...
113
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APCCAS
2006
IEEE
15 years 10 months ago
2006
IEEE
We described an H.264 decoder implemented with our design methodology, in which a system function model of transaction level is first captured in SystemC and refined into RTL with ...
156
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CODES
2006
IEEE
15 years 10 months ago
2006
IEEE
Transaction-level modeling has been touted to improve simulation performance and modeling efficiency for early design space exploration. But no tools are available to generate suc...
108
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INFSOF
2006
15 years 4 months ago
2006
Contemporary embedded systems quite often employ extremely complicated software consisting of a number of interrelated components, and this has made object-oriented design methodo...