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» Hardware Synthesis from Term Rewriting Systems
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CODES
2006
IEEE
14 years 22 days ago
A unified hardware/software runtime environment for FPGA-based reconfigurable computers using BORPH
This paper presents a hw/sw codesign methodology based on BORPH, an operating system designed for FPGA-based reconfigurable computers (RC's). By providing native kernel suppo...
Hayden Kwok-Hay So, Artem Tkachenko, Robert W. Bro...
PVLDB
2010
122views more  PVLDB 2010»
13 years 7 months ago
From a Stream of Relational Queries to Distributed Stream Processing
Applications from several domains are now being written to process live data originating from hardware and softwarebased streaming sources. Many of these applications have been wr...
Qiong Zou, Huayong Wang, Robert Soulé, Mart...
ASPLOS
2009
ACM
14 years 9 months ago
Complete information flow tracking from the gates up
For many mission-critical tasks, tight guarantees on the flow of information are desirable, for example, when handling important cryptographic keys or sensitive financial data. We...
Mohit Tiwari, Hassan M. G. Wassel, Bita Mazloom, S...
IWOMP
2010
Springer
13 years 11 months ago
How OpenMP Applications Get More Benefit from Many-Core Era
With the approaching of the many-core era, it becomes more and more difficult for a single OpenMP application to efficiently utilize all the available processor cores. On the other...
Jianian Yan, Jiangzhou He, Wentao Han, Wenguang Ch...
ACSD
2009
IEEE
136views Hardware» more  ACSD 2009»
14 years 3 months ago
Model Checking Verilog Descriptions of Cell Libraries
We present a formal semantics for a subset of Verilog, commonly used to describe cell libraries, in terms of transition systems. Such transition systems can serve as input to symb...
Matthias Raffelsieper, Jan-Willem Roorda, Mohammad...