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» Hardware efficient architectures for Eigenvalue computation
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ISCAS
2003
IEEE
79views Hardware» more  ISCAS 2003»
14 years 1 months ago
Computation reduction in cascaded DCT-domain video downscaling transcoding
In this paper, we propose efficient techniques and architectures for realizing spatial-downscaling transcoders in the DCT domain. We also present methods for re-sampling motion ve...
Yuh-Ruey Lee, Chia-Wen Lin, Yen-Wen Chen
FCCM
2004
IEEE
133views VLSI» more  FCCM 2004»
14 years 7 days ago
A Methodology for Synthesis of Efficient Intrusion Detection Systems on FPGAs
Intrusion detection for network security is a computation intensive application demanding high system performance. System level design, a relatively unexplored field in this area,...
Zachary K. Baker, Viktor K. Prasanna
AAAI
1997
13 years 9 months ago
Efficient Management of Very Large Ontologies
This paper describes an environment for supporting very large ontologies. The system can be used on single PCs, workstations, a cluster of workstations, and high-end parallel supe...
Kilian Stoffel, Merwyn G. Taylor, James A. Hendler
IPPS
2002
IEEE
14 years 1 months ago
Eclipse: Heterogeneous Multiprocessor Architecture for Flexible Media Processing
Eclipse is a heterogeneous multiprocessor architecture for high-performance media processing, including highdefinition MPEG encoding/decoding. The scalable architecture framework ...
Martijn J. Rutten, Jos T. J. van Eijndhoven, Evert...
FPL
2008
Springer
116views Hardware» more  FPL 2008»
13 years 10 months ago
NOC architecture design for multi-cluster chips
For the next generation of multi-core processors, the onchip interconnection networks must be efficient to achieve high data throughput and performance. Moreover, these interconne...
Henrique C. Freitas, Philippe Olivier Alexandre Na...