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ISCA
1997
IEEE
137views Hardware» more  ISCA 1997»
14 years 3 months ago
A Language for Describing Predictors and Its Application to Automatic Synthesis
As processor architectures have increased their reliance on speculative execution to improve performance, the importance of accurate prediction of what to execute speculatively ha...
Joel S. Emer, Nicholas C. Gloy
ETS
2007
IEEE
128views Hardware» more  ETS 2007»
14 years 19 days ago
Selecting Power-Optimal SBST Routines for On-Line Processor Testing
Software-Based Self-Test (SBST) has emerged as an effective strategy for on-line testing of processors integrated in non-safety critical embedded system applications. Among the mo...
Andreas Merentitis, Nektarios Kranitis, Antonis M....
ISLPED
2010
ACM
165views Hardware» more  ISLPED 2010»
13 years 11 months ago
Power-efficient directional wireless communication on small form-factor mobile devices
Wireless access is known to be power-hungry for mobile devices. A key reason is that devices radiate power in all directions and much of this power will not reach the destination....
Ardalan Amiri Sani, Hasan Dumanli, Lin Zhong, Ashu...
GRAPHITE
2007
ACM
14 years 2 months ago
GPU-based shape from silhouettes
In this paper, we present a new method for surface-based shape reconstruction from a set of silhouette images. We propose to project the viewing cones from all viewpoints to the 3...
Sofiane Yous, Hamid Laga, Masatsugu Kidode, Kunihi...
DAC
2007
ACM
14 years 12 months ago
Scan Test Planning for Power Reduction
Many STUMPS architectures found in current chip designs allow disabling of individual scan chains for debug and diagnosis. In a recent paper it has been shown that this feature can...
Christian G. Zoellin, Hans-Joachim Wunderlich, Jen...