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» Hardware scheduling support in SMP architectures
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TON
2010
115views more  TON 2010»
13 years 1 months ago
Feedback-Based Scheduling for Load-Balanced Two-Stage Switches
Abstract--A framework for designing feedback-based scheduling algorithms is proposed for elegantly solving the notorious packet missequencing problem of a load-balanced switch. Unl...
Bing Hu, Kwan L. Yeung
ISCA
1995
IEEE
118views Hardware» more  ISCA 1995»
13 years 10 months ago
The EM-X Parallel Computer: Architecture and Basic Performance
Latency tolerance is essential in achieving high performance on parallel computers for remote function calls and fine-grained remote memory accesses. EM-X supports interprocessor ...
Yuetsu Kodama, Hirohumi Sakane, Mitsuhisa Sato, Ha...
FPL
2009
Springer
154views Hardware» more  FPL 2009»
13 years 11 months ago
Compiler assisted runtime task scheduling on a reconfigurable computer
Multitasking reconfigurable computers with one or more reconfigurable processors are being used increasingly during the past few years. One of the major challenges in such systems...
Mojtaba Sabeghi, Vlad Mihai Sima, Koen Bertels
ACSD
2005
IEEE
90views Hardware» more  ACSD 2005»
14 years 10 days ago
Extensible and Scalable Time Triggered Scheduling
The objective of this paper is to present how to design a system that can accommodate additional functionality with either no changes to the design or adding architectural modules...
Wei Zheng, Jike Chong, Claudio Pinello, Sri Kanaja...
SIGOPSE
1998
ACM
13 years 11 months ago
MMLite: a highly componentized system architecture
MMLite is a modular system architecture that is suitable for a wide variety of hardware and applications. The system provides a selection of object-based components that are dynam...
Johannes Helander, Alessandro Forin