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JUCS
2010
143views more  JUCS 2010»
13 years 6 months ago
Design of Arbiters and Allocators Based on Multi-Terminal BDDs
: Assigning one (more) shared resource(s) to several requesters is a function of arbiters (allocators). This class of decision-making modules can be implemented in a number of ways...
Václav Dvorák, Petr Mikusek
FMSD
2007
110views more  FMSD 2007»
13 years 7 months ago
Exploiting interleaving semantics in symbolic state-space generation
Symbolic techniques based on Binary Decision Diagrams (BDDs) are widely employed for reasoning about temporal properties of hardware circuits and synchronous controllers. However, ...
Gianfranco Ciardo, Gerald Lüttgen, Andrew S. ...
DSN
2007
IEEE
14 years 1 months ago
Using Process-Level Redundancy to Exploit Multiple Cores for Transient Fault Tolerance
Transient faults are emerging as a critical concern in the reliability of general-purpose microprocessors. As architectural trends point towards multi-threaded multi-core designs,...
Alex Shye, Tipp Moseley, Vijay Janapa Reddi, Josep...
ERSA
2009
185views Hardware» more  ERSA 2009»
13 years 5 months ago
Woolcano: An Architecture And Tool Flow For Dynamic Instruction Set Extension On Xilinx Virtex-4 FX
In this paper, we introduce the Woolcano reconfigurable processor architecture. The architecture is based on the Xilinx Virtex-4 FX FPGA and leverages the Auxiliary Processing Uni...
Mariusz Grad, Christian Plessl
LCTRTS
2009
Springer
14 years 2 months ago
Synergistic execution of stream programs on multicores with accelerators
The StreamIt programming model has been proposed to exploit parallelism in streaming applications on general purpose multicore architectures. The StreamIt graphs describe task, da...
Abhishek Udupa, R. Govindarajan, Matthew J. Thazhu...