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CODES
2000
IEEE
13 years 12 months ago
Co-design of interleaved memory systems
Memory interleaving is a cost-efficient approach to increase bandwidth. Improving data access locality and reducing memory access conflicts are two important aspects to achieve hi...
Hua Lin, Wayne Wolf
IJHPCA
2008
75views more  IJHPCA 2008»
13 years 7 months ago
Towards Ultra-High Resolution Models of Climate and Weather
We present a speculative extrapolation of the performance aspects of an atmospheric general circulation model to ultra-high resolution and describe alternative technological paths...
Michael F. Wehner, Leonid Oliker, John Shalf
RTAS
2007
IEEE
14 years 1 months ago
Hijack: Taking Control of COTS Systems for Real-Time User-Level Services
This paper focuses on a technique to empower commercial-off-the-shelf (COTS) systems with an execution environment, and corresponding services, to support realtime and embedded ap...
Gabriel Parmer, Richard West
RTAS
1998
IEEE
13 years 11 months ago
Bounding Loop Iterations for Timing Analysis
Static timing analyzers need to know the minimum and maximum number of iterations associated with each loop in a real-time program so accurate timing predictions can be obtained. ...
Christopher A. Healy, Mikael Sjödin, Viresh R...
RTAS
1995
IEEE
13 years 11 months ago
ControlShell: component-based real-time programming
Real-time system software is notoriously hard to share and reuse. This paper walks through the methodology and application of ControlShell, a component-based programming system re...
Stanley A. Schneider, Vincent W. Chen, Gerardo Par...