The Cell processor is a heterogeneous multi-core processor with one Power Processing Engine (PPE) core and eight Synergistic Processing Engine (SPE) cores. Each SPE has a directly...
Kevin O'Brien, Kathryn M. O'Brien, Zehra Sura, Ton...
Abstract Code optimization for digital signal processors DSPs has been identi ed as an important new topic in system-level design of embedded systems. Both DSP processors and algor...
TCB Code Execution (Extended Abstract)∗ Jonathan M. McCune, Bryan Parno, Adrian Perrig, Michael K. Reiter, and Arvind Seshadri Carnegie Mellon University We propose an architect...
Jonathan M. McCune, Bryan Parno, Adrian Perrig, Mi...
Continuous transistor scaling due to improvements in CMOS devices and manufacturing technologies is increasing processor power densities and temperatures; thus, creating challenges...
David Atienza, Giovanni De Micheli, Luca Benini, J...
We explore runtime mechanisms and policies for scheduling dynamic multi-grain parallelism on heterogeneous multi-core processors. Heterogeneous multi-core processors integrate con...
Filip Blagojevic, Dimitrios S. Nikolopoulos, Alexa...