Sciweavers

40 search results - page 7 / 8
» Hardware-Accelerated Simulated Radiography
Sort
View
JCM
2007
76views more  JCM 2007»
13 years 6 months ago
Scheduling Small Packets in IPSec Multi-accelerator Based Systems
—IPSec is a suite of protocols that adds security to communications at the IP level. Protocols within the IPSec suite make extensive use of cryptographic algorithms. Since these ...
Antonio Vincenzo Taddeo, Alberto Ferrante, Vincenz...
TOG
2002
112views more  TOG 2002»
13 years 6 months ago
Ray tracing on programmable graphics hardware
Recently a breakthrough has occurred in graphics hardware: fixed function pipelines have been replaced with programmable vertex and fragment processors. In the near future, the gr...
Timothy J. Purcell, Ian Buck, William R. Mark, Pat...
SC
2005
ACM
14 years 11 days ago
Intelligent Feature Extraction and Tracking for Visualizing Large-Scale 4D Flow Simulations
Terascale simulations produce data that is vast in spatial, temporal, and variable domains, creating a formidable challenge for subsequent analysis. Feature extraction as a data r...
Fan-Yin Tzeng, Kwan-Liu Ma
AVI
2008
13 years 9 months ago
Agent warp engine: formula based shape warping for networked applications
Computer visualization and networking have advanced dramatically over the last few years, partially driven by the exploding video game market. 3D hardware acceleration has reached...
Alexander Repenning, Andri Ioannidou
FCCM
2007
IEEE
117views VLSI» more  FCCM 2007»
14 years 1 months ago
FPGA Acceleration of Gene Rearrangement Analysis
In this paper we present our work toward FPGA acceleration of phylogenetic reconstruction, a type of analysis that is commonly performed in the fields of systematic biology and co...
Jason D. Bakos