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LPAR
2005
Springer
14 years 1 months ago
Deciding Separation Logic Formulae by SAT and Incremental Negative Cycle Elimination
Separation logic is a subset of the quantifier-free first order logic. It has been successfully used in the automated verification of systems that have large (or unbounded) inte...
Chao Wang, Franjo Ivancic, Malay K. Ganai, Aarti G...
FMCAD
2004
Springer
13 years 11 months ago
Memory Efficient All-Solutions SAT Solver and Its Application for Reachability Analysis
This work presents a memory-efficient All-SAT engine which, given a propositional formula over sets of important and non-important variables, returns the set of all the assignments...
Orna Grumberg, Assaf Schuster, Avi Yadgar
INFORMATICALT
2010
103views more  INFORMATICALT 2010»
13 years 6 months ago
Formal Correctness Proof for DPLL Procedure
The DPLL procedure for the SAT problem is one of the fundamental algorithms in computer science, with many applications in a range of domains, including software and hardware veri...
Filip Maric, Predrag Janicic
SAT
2004
Springer
97views Hardware» more  SAT 2004»
14 years 1 months ago
Using Lower-Bound Estimates in SAT-Based Pseudo-Boolean Optimization
Linear Pseudo-Boolean constraints offer a much more compact formalism to express significant boolean problems in several areas, ranging from Artificial Intelligence to Electroni...
Vasco M. Manquinho, João P. Marques Silva
DISOPT
2008
88views more  DISOPT 2008»
13 years 8 months ago
New updating criteria for conflict-based branching heuristics in DPLL algorithms for satisfiability
The paper is concerned with the computational evaluation and comparison of a new family of conflict-based branching heuristics for evolved DPLL Satisfiability solvers. Such a fami...
Renato Bruni, Andrea Santori