Sciweavers

901 search results - page 10 / 181
» Hiding Communication Latency in Data Parallel Applications
Sort
View
ISPASS
2005
IEEE
14 years 1 months ago
Reaping the Benefit of Temporal Silence to Improve Communication Performance
Communication misses--those serviced by dirty data in remote caches--are a pressing performance limiter in shared-memory multiprocessors. Recent research has indicated that tempor...
Kevin M. Lepak, Mikko H. Lipasti
ESORICS
2006
Springer
13 years 11 months ago
Timing Analysis in Low-Latency Mix Networks: Attacks and Defenses
Abstract. Mix networks are a popular mechanism for anonymous Internet communications. By routing IP traffic through an overlay chain of mixes, they aim to hide the relationship bet...
Vitaly Shmatikov, Ming-Hsiu Wang
PPOPP
1995
ACM
13 years 11 months ago
Optimistic Active Messages: A Mechanism for Scheduling Communication with Computation
Low-overhead message passing is critical to the performance of many applications. Active Messages[27] reduce the software overhead for message handling: messages are run as handle...
Deborah A. Wallach, Wilson C. Hsieh, Kirk L. Johns...
HPDC
1997
IEEE
13 years 12 months ago
Supporting Parallel Applications on Clusters of Workstations: The Intelligent Network Interface Approach
This paper presents a novel networking architecture designed for communication intensive parallel applications running on clusters of workstations (COWs) connected by highspeed ne...
Marcel-Catalin Rosu, Karsten Schwan, Richard Fujim...
PPOPP
2009
ACM
14 years 8 months ago
A compiler-directed data prefetching scheme for chip multiprocessors
Data prefetching has been widely used in the past as a technique for hiding memory access latencies. However, data prefetching in multi-threaded applications running on chip multi...
Dhruva Chakrabarti, Mahmut T. Kandemir, Mustafa Ka...