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ICISC
2008
103views Cryptology» more  ICISC 2008»
13 years 9 months ago
Generalized Universal Circuits for Secure Evaluation of Private Functions with Application to Data Classification
Secure Evaluation of Private Functions (PF-SFE) allows two parties to compute a private function which is known by one party only on private data of both. It is known that PF-SFE c...
Ahmad-Reza Sadeghi, Thomas Schneider 0003
NIPS
2001
13 years 9 months ago
Orientation-Selective aVLSI Spiking Neurons
We describe a programmable multi-chip VLSI neuronal system that can be used for exploring spike-based information processing models. The system consists of a silicon retina, a PIC...
Shih-Chii Liu, Jörg Kramer, Giacomo Indiveri,...
ASPDAC
2005
ACM
131views Hardware» more  ASPDAC 2005»
13 years 9 months ago
Analysis of buffered hybrid structured clock networks
- This paper presents a novel approach for fast transient analysis of buffered hybrid structured clock networks. The new method applies structure reduction and relaxed hierarchical...
Yi Zou, Qiang Zhou, Yici Cai, Xianlong Hong, Sheld...
MICRO
2006
IEEE
159views Hardware» more  MICRO 2006»
13 years 7 months ago
MRF Reinforcer: A Probabilistic Element for Space Redundancy in Nanoscale Circuits
Shrinking devices to the nanoscale, increasing integration densities, and reducing of voltage levels down to the thermal limit, all conspire to produce faulty systems. Frequent oc...
Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, Will...
ISCAS
2007
IEEE
173views Hardware» more  ISCAS 2007»
14 years 1 months ago
Critical Charge Characterization for Soft Error Rate Modeling in 90nm SRAM
— Due to continuous technology scaling, the reduction of nodal capacitances and the lowering of power supply voltages result in an ever decreasing minimal charge capable of upset...
Riaz Naseer, Younes Boulghassoul, Jeff Draper, San...