162 search results - page 4 / 33 » Hierarchical Placement and Network Design Problems |
GLOBECOM
2009
IEEE
14 years 2 months ago
2009
IEEE
—Most research works in routing and design of optical networks assume that the optical medium can carry data signals without any bit error. However, physical impairments of the o...
ADHOCNOW
2005
Springer
14 years 1 months ago
2005
Springer
— In this paper, we address an optimization problem that arises in context of cache placement in sensor networks. In particular, we consider the cache placement problem where the...
ASPDAC
2008
ACM
13 years 9 months ago
2008
ACM
Traditionally, clock network layout is performed after cell placement. Such methodology is facing a serious problem in nanometer IC designs where people tend to use huge clock buff...
IR
2002
13 years 7 months ago
2002
This paper presents the design and evaluation of a text categorization method based on the Hierarchical Mixture of Experts model. This model uses a divide and conquer principle to ...
JCP
2008
13 years 7 months ago
2008
Sleep transistors in industrial power-gating designs are custom designed with an optimal size. Consequently, sleep transistor P/G network optimization becomes a problem of finding ...