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EURODAC
1990
IEEE
73views VHDL» more  EURODAC 1990»
13 years 11 months ago
A new method for the state reduction of incompletely specified finite sequential machines
Maria J. Avedillo, José M. Quintana, Jos&ea...
FDL
2004
IEEE
13 years 11 months ago
Enabling SystemC Verification using Abstract State Machines
Amjad Gawanmeh, Ali Habibi, Sofiène Tahar
APAQS
2001
IEEE
13 years 11 months ago
Testable Use Cases in the Abstract State Machine Language
Wolfgang Grieskamp, Markus Lepper, Wolfram Schulte...