Sciweavers

1053 search results - page 62 / 211
» Hierarchies and levels of reality
Sort
View
CCGRID
2006
IEEE
14 years 2 months ago
Proposal of MPI Operation Level Checkpoint/Rollback and One Implementation
With the increasing number of processors in modern HPC(High Performance Computing) systems, there are two emergent problems to solve. One is scalability, the other is fault tolera...
Yuan Tang, Graham E. Fagg, Jack Dongarra
MICRO
2006
IEEE
132views Hardware» more  MICRO 2006»
14 years 2 months ago
Scalable Cache Miss Handling for High Memory-Level Parallelism
Recently-proposed processor microarchitectures for high Memory Level Parallelism (MLP) promise substantial performance gains. Unfortunately, current cache hierarchies have Miss-Ha...
James Tuck, Luis Ceze, Josep Torrellas
FPL
2010
Springer
124views Hardware» more  FPL 2010»
13 years 6 months ago
Finding System-Level Information and Analyzing Its Correlation to FPGA Placement
One of the more popular placement algorithms for Field Programmable Gate Arrays (FPGAs) is called Simulated Annealing (SA). This algorithm tries to create a good quality placement ...
Farnaz Gharibian, Lesley Shannon, Peter Jamieson
ICPR
2002
IEEE
14 years 9 months ago
Hierarchical Monitoring of People's Behaviors in Complex Environments Using Multiple Cameras
We present a distributed, surveillance system that works in large and complex indoor environments. To track and recognize behaviors of people, we propose the use of the Hidden Mar...
Nam Thanh Nguyen, Svetha Venkatesh, Geoff A. W. We...
CSL
2003
Springer
14 years 2 months ago
The Arithmetical Complexity of Dimension and Randomness
Constructive dimension and constructive strong dimension are effectivizations of the Hausdorff and packing dimensions, respectively. Each infinite binary sequence A is assigned...
John M. Hitchcock, Jack H. Lutz, Sebastiaan Terwij...