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» High Performance Pipelined Process Migration with RDMA
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IPPS
2010
IEEE
13 years 5 months ago
Highly scalable parallel sorting
Sorting is a commonly used process with a wide breadth of applications in the high performance computing field. Early research in parallel processing has provided us with comprehen...
Edgar Solomonik, Laxmikant V. Kalé
ICDE
2010
IEEE
231views Database» more  ICDE 2010»
14 years 2 months ago
Estimating the progress of MapReduce pipelines
Abstract— In parallel query-processing environments, accurate, time-oriented progress indicators could provide much utility given that inter- and intra-query execution times can ...
Kristi Morton, Abram Friesen, Magdalena Balazinska...
BMCBI
2008
122views more  BMCBI 2008»
13 years 7 months ago
High-throughput bioinformatics with the Cyrille2 pipeline system
Background: Modern omics research involves the application of high-throughput technologies that generate vast volumes of data. These data need to be pre-processed, analyzed and in...
Mark W. E. J. Fiers, Ate van der Burgt, Erwin Date...
MAM
2007
113views more  MAM 2007»
13 years 7 months ago
A reconfigurable computing framework for multi-scale cellular image processing
Cellular computing architectures represent an important class of computation that are characterized by simple processing elements, local interconnect and massive parallelism. Thes...
Reid B. Porter, Jan R. Frigo, Al Conti, Neal R. Ha...
ISCA
2002
IEEE
95views Hardware» more  ISCA 2002»
14 years 14 days ago
An Instruction Set and Microarchitecture for Instruction Level Distributed Processing
An instruction set architecture (ISA) suitable for future microprocessor design constraints is proposed. The ISA has hierarchical register files with a small number of accumulator...
Ho-Seop Kim, James E. Smith