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SBACPAD
2008
IEEE
170views Hardware» more  SBACPAD 2008»
14 years 1 months ago
Using Analytical Models to Efficiently Explore Hardware Transactional Memory and Multi-Core Co-Design
Transactional memory is emerging as a parallel programming paradigm for multi-core processors. Despite the recent interest in transactional memory, there has been no study to char...
James Poe, Chang-Burm Cho, Tao Li
ISCAS
2003
IEEE
235views Hardware» more  ISCAS 2003»
14 years 18 days ago
Enhanced chaotic image encryption algorithm based on Baker's map
Imaging has gained importance due to the improvements of performances in computer speed, media storage and network bandwidth. Along with this advancement, the fundamental issue of...
Mazleena bt. Salleh, Subariah bt. Ibrahim, I. F. I...
ICC
2007
IEEE
139views Communications» more  ICC 2007»
14 years 1 months ago
Generic Centralized Downlink Scheduler for Next Generation Wireless Cellular Networks
– Future wireless cellular networks such as High Speed Downlink Packet Access (HSDPA) and 1x EVolution Data Optimized (1xEV-DO) promise to revolutionize the mobile user’s wirel...
Bader Al-Manthari, Najah A. Abu Ali, Nidal Nasser,...
CN
2010
130views more  CN 2010»
13 years 4 months ago
CoreCast: How core/edge separation can help improving inter-domain live streaming
The rapid growth of broadband access has popularized multimedia services, which nowadays contribute to a large part of Internet traffic. Among this content, the broadcasting of li...
Loránd Jakab, Albert Cabellos-Aparicio, Tho...
EUC
2005
Springer
14 years 26 days ago
An Integrated Scheme for Address Assignment and Service Location in Pervasive Environments
We propose an efficient scheme called CoReS (Configuration and Registration Scheme) that integrates address assignment and service location for ad hoc networks prevalent in pervasi...
Mijeom Kim, Mohan Kumar, Behrooz Shirazi