733 search results - page 114 / 147 » High performance in tree-based parallel architectures |
SIGGRAPH
2010
ACM
14 years 1 months ago
2010
ACM
The NVIDIA® OptiX™ ray tracing engine is a programmable system designed for NVIDIA GPUs and other highly parallel architectures. The OptiX engine builds on the key observation ...
ICDCS
2008
IEEE
14 years 3 months ago
2008
IEEE
— Checkpointing is an indispensable technique to provide fault tolerance for long-running high-throughput applications like those running on desktop grids. This paper argues that...
ICS
2005
Tsinghua U.
14 years 2 months ago
2005
Tsinghua U.
We propose an organization for the on-chip memory system of a chip multiprocessor, in which 16 processors share a 16MB pool of 256 L2 cache banks. The L2 cache is organized as a n...
LCPC
2005
Springer
14 years 2 months ago
2005
Springer
With the increase of transistors integrated onto a chip, multi core processor architectures have attracted much attention to achieve high effective performance, shorten developmen...
IPPS
2000
IEEE
14 years 1 months ago
2000
IEEE
The Simultaneous Optical Multiprocessor Exchange Bus (SOME-Bus) is a low-latency, high-bandwidth interconnection network which directly links arbitrary pairs of processor nodes wit...