733 search results - page 12 / 147 » High performance in tree-based parallel architectures |
EUROPAR
2009
Springer
14 years 2 months ago
2009
Springer
Moore’s Law suggests that the number of processing cores on a single chip increases exponentially. The future performance increases will be mainly extracted from thread-level par...
EUROPAR
1999
Springer
13 years 12 months ago
1999
Springer
Abstract. The High Performance Fortran (HPF) benchmark suite HPFBench was designed for evaluating the HPF language and compilers on scalable architectures. The functionality of the...
HIPC
2000
Springer
13 years 11 months ago
2000
Springer
Many scientific applications manipulate large amount of data and, therefore, are parallelized on high-performance computing systems to take advantage of their computational power a...
ASAP
2000
IEEE
13 years 12 months ago
2000
IEEE
High level modeling and (quantitative) performance analysis of signal processing systems requires high level models for the applications(algorithms) and the implementations (archi...
HPDC
1998
IEEE
13 years 11 months ago
1998
IEEE
This paper introduces Strings, a high performance distributed shared memory system designed for clusters of symmetrical multiprocessors (SMPs). The distinguishing feature of this ...