Sciweavers

733 search results - page 58 / 147
» High performance in tree-based parallel architectures
Sort
View
CASES
2001
ACM
14 years 17 days ago
A compiler framework for mapping applications to a coarse-grained reconfigurable computer architecture
The rapid growth of silicon densities has made it feasible to deploy reconfigurable hardware as a highly parallel computing platform. However, in most cases, the application needs...
Girish Venkataramani, Walid A. Najjar, Fadi J. Kur...
FPGA
2004
ACM
121views FPGA» more  FPGA 2004»
14 years 2 months ago
Highly pipelined asynchronous FPGAs
We present the design of a high-performance, highly pipelined asynchronous FPGA. We describe a very fine-grain pipelined logic block and routing interconnect architecture, and sh...
John Teifel, Rajit Manohar
LCPC
1995
Springer
14 years 14 days ago
Compiler Architectures for Heterogeneous Systems
Heterogeneous parallel systems incorporate diverse models of parallelism within a single machine or across machines and are better suited for diverse applications 25, 43, 30]. Thes...
Kathryn S. McKinley, Sharad Singhai, Glen E. Weave...
NPL
1998
133views more  NPL 1998»
13 years 8 months ago
Parallel Coarse Grain Computing of Boltzmann Machines
Abstract. The resolution of combinatorial optimization problems can greatly benefit from the parallel and distributed processing which is characteristic of neural network paradigm...
Julio Ortega, Ignacio Rojas, Antonio F. Día...
HOTI
2008
IEEE
14 years 3 months ago
A Network Fabric for Scalable Multiprocessor Systems
Much of high performance technical computing has moved from shared memory architectures to message based cluster systems. The development and wide adoption of the MPI parallel pro...
Nitin Godiwala, Jud Leonard, Matthew Reilly