Sciweavers

733 search results - page 63 / 147
» High performance in tree-based parallel architectures
Sort
View
IPPS
1997
IEEE
14 years 1 months ago
Cyclic Networks: A Family of Versatile Fixed-Degree Interconnection Architectures
In this paper, we propose a new family of interconnection networks, called cyclic networks (CNs), in which an intercluster connection is defined on a set of nodes whose addresses...
Chi-Hsiang Yeh, Behrooz Parhami
HPCA
2009
IEEE
14 years 9 months ago
A novel architecture of the 3D stacked MRAM L2 cache for CMPs
Magnetic Random Access Memory (MRAM) is considered to be a promising future memory technology due to its low leakage power, high density and fast read speed. The heterogeneous int...
Guangyu Sun, Xiangyu Dong, Yuan Xie, Jian Li, Yira...
IPPS
1997
IEEE
14 years 1 months ago
DPF: A Data Parallel Fortran Benchmark Suite
We present the Data Parallel Fortran (DPF) benchmark suite, a set of data parallel Fortran codes forevaluatingdata parallel compilers appropriatefor any target parallel architectu...
Y. Charlie Hu, S. Lennart Johnsson, Dimitris Kehag...
ICDE
1999
IEEE
113views Database» more  ICDE 1999»
14 years 10 months ago
Parallel Algorithms for Computing Temporal Aggregates
The ability to model the temporal dimension is essential to many applications. Furthermore, the rate of increase in database size and response time requirements has outpaced advan...
Jose Alvin G. Gendrano, Bruce C. Huang, Jim M. Rod...
CSE
2011
IEEE
12 years 8 months ago
Parallel Execution of AES-CTR Algorithm Using Extended Block Size
—Data encryption and decryption are common operations in a network based application programs with security. In order to keep pace with the input data rate in such applications, ...
Nhat-Phuong Tran, Myungho Lee, Sugwon Hong, Seung-...