Sciweavers

733 search results - page 81 / 147
» High performance in tree-based parallel architectures
Sort
View
IPPS
2007
IEEE
14 years 3 months ago
Software and Algorithms for Graph Queries on Multithreaded Architectures
Search-based graph queries, such as finding short paths and isomorphic subgraphs, are dominated by memory latency. If input graphs can be partitioned appropriately, large cluster...
Jonathan W. Berry, Bruce Hendrickson, Simon Kahan,...
CCGRID
2006
IEEE
14 years 2 months ago
Scalable Approaches for Supporting MPI-IO Atomicity
Scalable atomic and parallel access to noncontiguous regions of a file is essential to exploit high performance I/O as required by large-scale applications. Parallel I/O framewor...
Peter M. Aarestad, Avery Ching, George K. Thiruvat...
ICPP
2006
IEEE
14 years 2 months ago
Vector Lane Threading
Multi-lane vector processors achieve excellent computational throughput for programs with high data-level parallelism (DLP). However, application phases without significant DLP ar...
Suzanne Rivoire, Rebecca Schultz, Tomofumi Okuda, ...
HIPS
1998
IEEE
14 years 1 months ago
Implementing Automatic Coordination on Networks of Workstations
Distributed shared objects are a well known approach to achieve independenceof the memory model for parallel programming. The illusion of shared (global) objects is a conabstracti...
Christian Weiß, Jürgen Knopp, Hermann H...
SASP
2008
IEEE
153views Hardware» more  SASP 2008»
14 years 3 months ago
TRaX: A Multi-Threaded Architecture for Real-Time Ray Tracing
Ray tracing is a technique used for generating highly realistic computer graphics images. In this paper, we explore the design of a simple but extremely parallel, multi-threaded, ...
Josef B. Spjut, Solomon Boulos, Daniel Kopta, Erik...